So I am in ACA, attempting to design a Mealy circuit that implements a binary-10's complement converter with FPGAs when I notice a guy over to my left completely passed out. This, in actuality, is not a rare occurrence as many in EE and BME are often driven to complete exhaustion, even by 1:30pm. Nevertheless, I look back a few moments later and he's awake on the computer. No big deal. HOWEVER, moments later, I look again (my attention span is really indicative of how interested I am in digital logic design), and he is completely comatose again. This happens a few times and I find it interesting enough to get out my camera to take a picture of him sleeping (for your viewing pleasure). So I sneak up on him(really, no sneaking was necessary) and am about to take the picture when I realize...
DANG. he's still awake!!
oh man. awkward.
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